1. Field of the Invention
The invention relates generally to a method of manufacturing a flash memory device. More particularly, the invention relates to a method of manufacturing a NAND flash memory device.
2. Discussion of Related Art
A method of manufacturing a NAND flash memory device in the related art is described below with reference to FIGS. 1A and 1B, which illustrate a gate formation process of a select transistor region, which is formed using the same process when a cell gate is formed in a cell region.
Referring to FIG. 1A, a tunnel oxide film 102, a first polysilicon film 103, a dielectric film 104, a second polysilicon film 105, a tungsten film 106, and a hard mask film 107 are sequentially formed on a semiconductor substrate 101, thereby forming a gate electrode in which a floating gate and a control gate are stacked and form a gate electrode having the same stack structure as that of the gate electrode in a select transistor region.
Thereafter, to remove micro trenches and plasma damage occurring upon etching of the gate, an oxidization process is performed to form an oxide film 108 on the gate sidewalls (preferably, the sidewalls of the first and second polysilicon films 103, 105).
An ion implantation process is carried out to form a junction unit 109 serving as the source and drain. After a first buffer oxide film 110 is formed on the entire structure, a nitride film 111 is formed. A blanket etch process is then performed to form spacers on the gate sidewalls.
Referring to FIG. 1B, after a second buffer oxide film 112 and a SAC nitride film 113 are formed on the entire structure, an insulating film 114 is formed in order to provide insulation between gate lines and insulation with an upper line.
Thereafter, regions of the insulating film 114, the SAC nitride film 113, and the second buffer oxide film 112 are etched using a SAC etch process, forming a contact through which the junction unit 109 is exposed. A conductive film 115 is formed to bury the contact, thereby forming a contact plug.
However, as devices become more highly integrated, the thickness of the hard mask film 107 gradually decreases. Furthermore, since the first buffer oxide film 110 is removed during the SAC etch process, the conductive film 115 is connected to the tungsten film 106. Accordingly, since the gate electrode and the contact plug may create a short circuit, the device may fail.